A batch optimization solver for diffusion area scheduling in semiconductor manufacturing
Information Control Problems in Manufacturing, Volume # 12 | Part# 1
Authors
Christian Artigues; Stephane Dauzere Peres; Alexandre Derreumaux; Olivier Sibille; Claude Yugma
Digital Object Identifier (DOI)
10.3182/20060517-3-FR-2903.00368
Page Numbers:
733-738
Index Terms
wafer fabrication,diffusion area,batch scheduling,disjunctive graph,local search
Abstract
We propose a method for solving a dayly batching and scheduling problem of lots of wafers in the diffusion area of a semiconductor plant. The involved complex constraints include in particular both minimal and maximal time lags and there are multiple objectives. The method is based on a disjunctive graph which allows fast calculation of operation start times from a partial or complete batching proposition. A prototype interactive software issued from this research is currently in test in the ATMEL Rousset fabrication unit.
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